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fujitsu semiconductor data sheet copyright?2008-2011 fujitsu semicond uctor limited all rights reserved 2011.1 assp for power management applications 2 ch dc/dc converter ic built-in switching fet & voltage detection function, pfm/pwm synchronous rectification, and down conversion support mb39c007 description the mb39c007 is a current mode type 2-channel dc/dc converter ic built-in voltage detection, synchronous rectifier, and down conversion support. the device is integrated with a switching fet, oscillator, error am- plifier, pfm/pwm control circuit, reference voltage source, and voltage detection circuit. external inductor and decoupling capacitor are needed only for the external component. mb39c007 is small, achieve a highly effective dc/dc conver ter in the full load range, this is suitable as the built-in power supply for handheld equipment su ch as mobile phone/pda, dvds, and hdds. features ? high efficiency : 96 % (max) ? low current consumption : 30 a (at pfm/ch) ? output current : 800 ma/ch (max) ? input voltage range : 2.5 v to 5.5 v ? operating frequency : 2.0 mhz (typ) ? built-in pwm operation fixed function ? no flyback diode needed ? low dropout operation : for 100 % on duty ? built-in high-precision reference voltage generator : 1.30 v 2 % ? consumption current in shutdown mode : 1 a or less ? built-in switching fet : p-ch mos 0.3 (typ) , n-ch mos 0.2 (typ) ? high speed for input and load transi ent response in the current mode ? over temperature protection ? packaged in a compact package : qfn-24 applications ?flash roms ?mp3 players ? electronic dictionary devices ? surveillance cameras ? portable gps navigators ? dvd drives ? ip phones ? network hubs ? mobile phones etc. ds04-27246-3e
mb39c007 2 ds04-27246-3e pin assignment lx2 lx1 dgnd2 dgnd2 dgnd1 dgnd1 ctlp 19 20 21 22 23 24 12 11 10 9 8 7 123456 18 17 16 15 14 13 vref ctl2 ctl1 agnd avdd dvdd2 dvdd2 out2 mode2 vrefin2 xpor dvdd1 dvdd1 out1 mode1 vrefin1 vdet (top view) (lcc-24p-m10)
mb39c007 ds04-27246-3e 3 pin descriptions pin no. pin name i/o description 1ctlpi voltage detection circuit block control input pin. (l : voltage detection function stop , h : normal operation) 2, 3 ctl2, ctl1 i dc/dc converter block control input pins. (l : shut down , h : normal operation) 4agnd ? control block ground pin. 5avdd ? control block power supply pin. 6 vref o reference voltage output pin. 7 vdet i voltage detection input pin. 8, 23 vrefin1, vrefin2 i error amplifie r (error amp) non-inverted input pins. 9, 22 mode1, mode2 i operation mode switch pins. (l : pfm/pwm mode , open : pwm mode) 10, 21 out1, out2 i output voltage feedback pins. 11, 12 dvdd1 ? drive block power supply pins. 19, 20 dvdd2 13, 18 lx1, lx2 o inductor connection output pins. high impedance during shut down. 14, 15 dgnd1 ? drive block ground pins. 16, 17 dgnd2 24 xpor o vdet circuit output pin. connected to an n-ch mos open drain circuit.
mb39c007 4 ds04-27246-3e i/o pin equivalent circuit diagram gnd vdd lx1 , lx2 ? ? gnd vdd vref xpor ? gnd ? gnd vdd ctl1 , ctl2 , ctlp gnd vdd ? ? vrefin1 , vrefin2 , vdet out1 , out2 ? ? mode1 , mode2 ? gnd vdd ? * : esd protection device
mb39c007 ds04-27246-3e 5 block diagram 3 ? + ? + v in dvdd2 11, 12 19, 20 dvdd1 avdd vout1 v in xpor 5 16, 17 dgnd2 14, 15 dgnd1 agnd 4 on/off on/off on/off ctl1 out1 3 10 8 vrefin1 dac 9 1 7 mode1 vdet ctlp ctl2 out2 v in dvdd1 i out comp. error amp error amp pfm/pwm logic control 3 ? + dvdd2 i out comp. pfm/pwm logic control lx1 13 vout2 lx2 18 24 1.30 v v ref vref vrefin2 mode2 6 21 2 23 22 mode control l:pfm/pwm open:pwm mode control l:pfm/pwm open:pwm
mb39c007 6 ds04-27246-3e ? current mode ? original voltage mode type : stabilize the output voltage by comparing two items below and on-duty control. - voltage (v c ) obtained through negative feedback of the output voltage by error amp - reference triangular wave (v tri ) ? current mode type : instead of the triangular wave (v tri ), the voltage (v idet ) obtained through i-v conversion of the sum of currents that flow in the oscillator (rectangula r wave generation circuit) and sw fet is used. stabilize the output voltage by comparing two items below and on-duty control. - voltage (v c ) obtained through negative feedback of the output voltage by error amp - voltage (v idet ) obtained through i-v conversion of the sum of current that fl ow in the oscillator (rectangular wave generation circuit) and sw fet v in ton toff v tri vc vc v tri v in toff vc vc v idet s r ton sr-ff v idet q ? + ? + voltage mode type model current mode type model oscillator note : the above models illustrate the general operation and an actual ope ration will be preferred in the ic.
mb39c007 ds04-27246-3e 7 function of each block ? pfm/pwm logic control circuit in normal operation, frequency (2.0 mh z) which is set by the built-in oscillator (square wave oscillation circuit) controls the built-in p-ch mos fet and n-ch mos fet for the synchronous rectification operation. in the light load mode, the intermittent (pfm) operation is executed. this circuit protects against pass-through current caused by synchronous rectification and against reverse current caused in a non-successive operation mode. ?i out comparator circuit this circuit detects the current (i lx ) which flows to the external inductor from the built-in p-ch mos fet. by comparing v idet obtained through i-v conversion of peak current i pk of i lx with the error amp output, the built-in p-ch mos fet is turned off vi a the pfm/pwm logic control circuit. ? error amp phase compensation circuit this circuit compares the output voltage to referenc e voltages such as vref. this ic has a built-in phase compensation circuit that is designed to optimize the operation of this ic. this needs neither to be considered nor addition of a phase compensation circuit and an external phase compensation device. ?vref circuit a high accuracy reference voltage is generated with bgr (bandgap reference) circuit. the output voltage is 1.30 v (typ). ? voltage detection (vdet) circuit the voltage detection circuit monitors the vdet pi n voltage. normally, use the xpor pin through pull-up with an external resistor. when the vdet pin voltage reaches 0.6 v, it reaches the h level. timing chart example : (xpor pin pulled up to v in ) ? protection circuit this ic has a built-in over-temperature protection circuit. the over-temperature protection circuit turns off both n-ch and p-ch switchi ng fets when the junction temperature reaches + 135 c. when the junction temperature comes down to + 110 c, the switching fet is returned to the normal operation. since the pfm/pwm co ntrol circuit of this ic is in the control method in current mode, the current peak value is al so monitored and controlled as required. v in ctlp vdet xpor v uvlo v thhpr v thlpr v uvlo : uvlo threshold voltage v thhpr , v thlpr : xpor threshold voltage
mb39c007 8 ds04-27246-3e ? function table * : don't care input output ctl1 ctl2 ctlp mode ch1 function ch2 function vdet function vref function switching operation l * stopped hl l l operation stopped stopped 1.3 v output pfm/pwm mode l h stopped operation hoperation l h stopped operation h l operation stopped l h stopped operation h operation hl l open operation stopped stopped pwm fixed mode l h stopped operation hoperation l h stopped operation h l operation stopped l h stopped operation h operation
mb39c007 ds04-27246-3e 9 absolute maximum ratings *1 : see the diagram of ? example of standard operation ch aracteristics. power dissipation vs. operating ambient temperature? for the package power dissipation of ta from + 25 c to + 85 c. *2 : when mounted on a four-layer epoxy board of 11.7 cm 8.4 cm *3 : ic is mounted on a four-layer epoxy board, which ha s thermal via, and the ic's thermal pad is connected to the epoxy board (ther mal via is 9 holes). *4 : ic is mounted on a four-layer epoxy board, which ha s no thermal via, and the ic's thermal pad is connected to the epoxy board. notes: ? the use of negative voltages below ? 0.3 v to the agnd, dgnd1, and dgnd2 pin may create parasitic transistors on lsi lines, which can cause abnormal operation. ? this device can be damaged if the lx1 pin and lx2 pin are short-circuited to avdd and dvdd1/dvdd2, or agnd and dgnd1/dgnd2. warning: semiconductor devices can be permanently dama ged by application of stress (voltage, current, temperature, etc.) in excess of absolute ma ximum ratings. do not exceed these ratings. parameter symbol condition rating unit min max power supply voltage v dd avdd = dvdd1 = dvdd2 ? 0.3 + 6.0 v signal input voltage v isig out1, out2 pins ? 0.3 v dd + 0.3 v ctlp, ctl1, ctl2, mode1, mode2 pins ? 0.3 v dd + 0.3 vrefin1, vrefin2 pins ? 0.3 v dd + 0.3 vdet pin ? 0.3 v dd + 0.3 xpor pull-up voltage v ixpor xpor pin ? 0.3 + 6.0 v lx voltage v lx lx1, lx2 pins ? 0.3 v dd + 0.3 v lx peak current i pk the upper limit value of i lx1 and i lx2 ? 1.8 a power dissipation p d ta + 25 c ? 3125* 1 , * 2 , * 3 mw ? 1563* 1 , * 2 , * 4 ta = + 85 c ? 1250* 1 , * 2 , * 3 mw ? 625* 1 , * 2 , * 4 operating ambient temperature ta ?? 40 + 85 c storage temperature t stg ?? 55 + 125 c
mb39c007 10 ds04-27246-3e recommended operating conditions note : the output current from this device has a situation to decrease if the power supply voltage (v in ) and the dc/dc converter output voltage (v out ) differ only by a small amount. this is a result of slope compen- sation and will not damage this device. warning: the recommended operating co nditions are required in order to ensure the normal operation of the semiconductor device. all of the device's el ectrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affe ct reliability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application out side the listed conditions are advised to contact their representatives beforehand. parameter symbol condition value unit min typ max power supply voltage v dd avdd = dvdd1 = dvdd2 2.5 3.7 5.5 v vrefin voltage v refin ? 0.15 ? 1.30 v ctl voltage v ctl ctlp, ctl1, ctl2 pins 0 ? 5.0 v lx current i lx i lx1 , i lx2 ?? 800 ma vref output current i rout 2.5 v avdd = dvdd1 = dvdd2 < 3.0 v ?? 0.5 ma 3.0 v avdd = dvdd1 = dvdd2 5.5 v ?? 1 xpor current i por ??? 1ma inductor value l ?? 2.2 ? h
mb39c007 ds04-27246-3e 11 electrical characteristics (ta = + 25 c, avdd = dvdd1 = dvdd2 = 3.7 v, vout1/vout2 setting value = 2.5 v, mode1/mode2 = 0 v) * : this value is not be specified. this should be us ed as a reference to support designing the circuits. (continued) parameter sym- bol pin no. condition value unit min typ max dc/dc converter block input current i refin 8, 23 vrefin = 0.15 v to 1.3 v ? 100 0 + 100 na output voltage v out 10, 21 vrefin = 0.833 v, out = ? 100 ma 2.45 2.50 2.55 v input stability line 2.5 v avdd = dvdd1 = dvdd2 5.5 v* 1 ?? 10 mv load stability load ? 100 ma out ? 800 ma ?? 10 mv out pin input impedance r out out = 2.0 v 0.6 1.0 1.5 m lx peak current i pk 13, 18 output shorted to gnd 0.9 1.2 1.7 a pfm/pwm switch current i msw ?? 30 ? ma oscillation frequency fosc ? 1.6 2.0 2.4 mhz rise delay time t pg 2, 3, 10, 21 c1/c2 = 4.7 f, out = 0 a, out1/out2 : 0 90 % v out ? 45 80 s sw nmos-fet off voltage v noff 13, 18 ?? ? 10* ? mv sw pmos-fet on resistance r onp lx1/lx2 = ? 100 ma ? 0.30 0.48 sw nmos-fet on resistance r onn lx1/lx2 = ? 100 ma ? 0.20 0.42 lx leak current i leakm 0 lx v dd * 2 ? 1.0 ? + 8.0 a i leakh vdd = 5.5 v, 0 lx v dd * 2 ? 2.0 ? + 16.0 a protection circuit block overheating protection (junction temp.) t otph ?? + 120* + 135* + 160* c t otpl + 95* + 110* + 125* c uvlo threshold voltage v thhuv 5, 11, 12, 19, 20 ? 2.17 2.30 2.43 v v thluv 2.03 2.15 2.27 v uvlo hysteresis width v hysuv ? 0.08 0.15 0.25 v voltage detection circuit block xpor threshold voltage v thhpr 7 ? 575 600 625 mv v thlpr 558 583 608 mv xpor hysteresis width v hyspr ?? 17 ? mv xpor output voltage v ol 24 xpor = 25 a ?? 0.1 v xpor output current i oh xpor = 5.5 v ?? 1.0 a
mb39c007 12 ds04-27246-3e (continued) (ta = + 25 c, avdd = dvdd1 = dvdd2 = 3.7 v, vout1/vout2 setting value = 2.5 v, mode1/mode2 = 0 v) *1 : the minimum value of avdd = dvdd1 = dvdd2 is the 2.5 v or v out setting value + 0.6 v, whichever is higher. *2 : the + leak at the lx1 pin and lx2 pin includes the current of the internal circuit. *3 : sum of the current flowing into the avdd, the dvdd1, and the dvdd2 pins. *4 : current consumption based on 100% on-duty (high si de fet in full on state). the sw fet gate drive current is not included because the device is in full on state (no switching operation). also the load current is not included. parameter symbol pin no. condition value unit min typ max control block ctl threshold voltage v thhct 1, 2, 3 ? 0.55 0.95 1.45 v v thlct ? 0.40 0.80 1.30 v ctl pin input current i ictl 0 v ctlp/ctl1/ctl2 3.7 v ?? 1.0 a reference voltage block vref voltage v ref 6 vref = 0 a 1.274 1.300 1.326 v vref load stability l oadref vref = ? 1.0 ma ?? 20 mv general shut down power supply current i vdd1 5, 11, 12, 19, 20 ctlp/ctl1/ctl2 = 0 v, state of all circuits off* 3 ?? 1.0 a i vdd1h ctlp/ctl1/ctl2 = 0 v, v dd = 5.5 v, state of all circuits off* 3 ?? 1.0 a power supply current at dc/dc operation 1 (pfm mode) i vdd21 1. ctlp = 0 v,ctl1 = 3.7 v, ctl2 = 0 v 2. ctlp = 0 v, ctl1 = 0 v, ctl2 = 3.7 v, out = 0 a ? 30 48 a i vdd22 ctlp = 0 v, ctl1/ctl2 = 3.7 v, out = 0 a ? 50 80 a power supply current at dc/dc operation 2 (pwm mode) i vdd31 1. ctlp = 0 v, ctl1 = 3.7 v, ctl2 = 0 v, mode1/ mode2 = open 2. ctlp = 0 v, ctl1 = 0 v, ctl2 = 3.7 v, mode1/ mode2 = open, out = 0 a ? 3.5 10.0 ma i vdd32 ctlp = 0 v, ctl1/ctl2 = 3.7 v, mode1/mode2 = open, out = 0 a ? 7.0 20.0 ma power supply current (voltage detec- tion mode) i vdd5 ctlp = 3.7 v, ctl1/ctl2 = 0 v ? 15 24 a power-on invalid current i vdd 1. ctl1 = 3.7 v, ctl2 = 0 v 2. ctl1 = 0 v, ctl2 = 3.7 v, vout1/vout2 = 90 % , out = 0 a* 4 ? 1000 2000 a
mb39c007 ds04-27246-3e 13 test circuit for measuring typical operating characteristics note : these components are recommended based on the operating tests authorized. tdk : tdk corporation ssm : susumu co., ltd koa : koa corporation component specification vendor part number remarks r1 1 m koa rk73g1jttd d 1 m r3-1 r3-2 20 k 150 k ssm ssm rr0816-203-d rr0816-154-d vout1/vout2 = 2.5 v setting r4 300 k ssm rr0816-304-d r5 510 k koa rk73g1jttd d 510 k r6 100 k ssm rr0816-104-d c1 4.7 f tdk c2012jb1a475k c2 4.7 f tdk c2012jb1a475k c3 0.1 f tdk c1608jb1e104k c6 0.1 f tdk c1608jb1h104k for adjusting slow start time l1 2.2 h tdk vlf4012at-2r2m vin vout1/ vout2 l1 2.2 h c1 4.7f i out c2 4.7 f ctl1/ctl2 mode1/mode2 vref vrefin1/vrefin2 agnd out1/out2 avdd lx1/lx2 dvdd1/dvdd2 gnd r1 1 m v dd v dd mb39c007 dgnd1/dgnd2 vdet r4 300 k r5 510 k r6 100 k c6 0.1 f sw c3 0.1 f r3-1 20 k r3-2 150 k sw vout = 2.97 vrefin
mb39c007 14 ds04-27246-3e application notes [1] selection of components ? selection of an external inductor basically it dose not need to design inductor. this ic is designed to operate efficiently with a 2.2 h external inductor. the inductor should be rated for a saturation current higher than the lx peak current value during normal operating conditions, and should have a minimal dc resistance. (100 m or less is recommended.) lx peak current value i pk is obtained by the following formula. l : external inductor value i out : load current v in : power supply voltage v out : output setting voltage d : on-duty to be switched ( = v out /v in ) fosc : switching frequency (2.0 mhz) ex) when v in = 3.7 v, v out = 2.5 v, i out = 0.8 a, l = 2.2 h, fosc = 2.0 mhz the maximum peak current value i pk is obtained by the following formula. ? i/o capacitor selection ? select a low equivalent series resistance (esr) fo r the vdd input capacitor to suppress dissipation from ripple currents. ? also select a low equivalent series resistance (esr) fo r the output capacitor. the variation in the inductor current causes ripple currents on the output capacitor which, in turn, causes ripple voltages an output equal to the amount of variation multiplied by the es r value. the output capacitor value has a significant impact on the operating stability of the device when used as a dc/dc converter. therefore, fujitsu semiconductor generally recommends a 4.7 f capacitor, or a larger capacitor value can be used if ripple voltages are not suitable. if the v in /v out voltage difference is within 0.6 v, the use of a 10 f output capacitor value is recommended. ? types of capacitors ceramic capacitors are effective for reducing the esr an d afford smaller dc/dc converter circuit. however, power supply functions as a heat generator, therefore avoid to use capacitor with the f-temperature rating ( ? 80 % to + 20 % ) . fujitsu semiconductor recommends capacitors with the b-temperature rating ( 10 % to 20 % ). normal electrolytic capacitors are not recommended due to their high esr. tantalum capacitor will reduce esr, however, it is d angerous to use because it turns into short mode when damaged. if you insist on using a tantalum capacit or, fujitsu semiconductor recommends the type with an internal fuse. i pk = i out + v in ? v out d 1 = i out + (v in ? v out ) v out l fosc 2 2 l fosc v in i pk = i out + (v in ? v out ) v out = 0.8 a + (3.7 v ? 2.5 v) 2.5 v : = 0.89 a 2 l fosc v in 2 2.2 h 2.0 mhz 3.7 v
mb39c007 ds04-27246-3e 15 [2] output voltage setting the output voltage v out (v out1 or v out2 ) of this ic is defined by the vo ltage input to vrefin (vrefin1 or vrefin2) . supply the voltage for inputting to vref in from an external power supply, or set the vref output by dividing it with resistors. the output voltage when the vrefin voltage is set by dividing the vref voltage with resistors is obtained by the following formula. note : refer to ? application circuit examples? for the an example of this circuit. although the output voltage is defined ac cording to the dividing ratio of resi stance, select the resistance value so that the current flowing through the resistance does not exceed the vref current rating (1 ma) . v out = 2.97 v refin , v refin = r2 v ref r1 + r2 (v ref = 1.30 v) r2 r1 vref vrefin vref vrefin mb39c007
mb39c007 16 ds04-27246-3e [3] about conversion efficiency the conversion efficiency can be improved by re ducing the loss of the dc/dc converter circuit. the total loss (p loss ) of the dc/dc converter is roughly divided as follows : p loss = p cont + p sw + p c p cont : control system circuit loss (the power used for th is ic to operate, including the gate driving power for internal sw fets) p sw : switching loss (the loss caused during sw itching of the ic's internal sw fets) p c : continuity loss (the loss caused when current s flow through the ic's internal sw fets and external circuits ) the ic's control circuit loss (p cont ) is extremely small, less than 100 mw* (with no load). as the ic contains fets which can switch fast er with less power, the continuity loss (p c ) is more predominant as the loss during heavy-load operatio n than the control circuit loss (p cont ) and switching loss (p sw ) . furthermore, the continuity loss (p c ) is divided roughly into the loss by internal sw fet on-resistance and by external inductor series resistance. p c = i out 2 (rdc + d r onp + (1 ? d) r onn ) d : switching on-duty cycle ( = v out / v in ) r onp : internal p-ch sw fet on resistance r onn : internal n-ch sw fet on resistance rdc : external inductor series resistance i out : load current the above formula indicates that it is important to reduce rdc as much as possible to improve efficiency by selecting components. * : the loss in the successive operation mode. this ic supp resses the loss in order to execute the pfm operation in the low load mode (less than 100 a in no load mode). mode is ch anged by the current peak value i pk which flows into switching fet. th e threshold value is about 30 ma.
mb39c007 ds04-27246-3e 17 [4] power dissipation and heat considerations the ic is so efficient that no consideration is required in most cases. however, if the ic is used at a low power supply voltage, heavy load, high ou tput voltage, or high temperature, it requires further consideration for higher efficiency. the internal loss (p) is roughly obtained from the following formula: p = i out 2 (d r onp + (1 ? d) r onn ) d : switching on-duty cycle ( = v out / v in ) r onp : internal p-ch sw fet on resistance r onn : internal n-ch sw fet on resistance i out : output current the loss expressed by the above formula is mainly continuity loss. the internal loss includes the switching loss and the control circuit loss as well but they are so small compared to the continuity loss they can be ignored. in this ic with r onp greater than r onn , the larger the on-duty cycle, the greater the loss. when assuming v in = 3.7 v, ta = + 70 c, for example, r onp = 0.36 and r onn = 0.30 according to the graph ?mos fet on resistance vs. operating ambient tem perature?. the ic's internal loss p is 123 mw at v out = 2.5 v and i out = 0.6 a. according to the graph ?power diss ipation vs. operating ambient temperature?, the power dissipation at an operating ambient temperature ta of + 70 c is 300 mw and the internal loss is smaller than the power dissipation.
mb39c007 18 ds04-27246-3e [5] xpor threshold voltage setting [v porh , v porl ] set the detection voltage by applying voltage to the vd et pin via an external resistor calculated according to this formula. v thhpr = 0.600 v v thlpr = 0.583 v ? example for setting detec tion voltage to 3.7 v r3 = 510 k r4 = 100 k v porh = r3 + r4 v thhpr r4 v porl = r3 + r4 v thlpr r4 v porh = 510 k + 100 k 0.600 = 3.66 : = 3.7 [v] 100 k v porl = 510 k + 100 k 0.583 = 3.56 : = 3.6 [v] 100 k r4 r3 1 m vin xpor avdd mb39c007 xpor vdet
mb39c007 ds04-27246-3e 19 [6] transient response normally, i out is suddenly changed while v in and v out are maintained constant, responsiveness including the response time and overshoot/undershoot voltage is ch ecked. as this ic has built-in error amp with an optimized design, it shows good transient response char acteristics. however, if ringing upon sudden change of the load is high due to the operating conditions, add capacitor c6 (e.g. 0.1 f). (since this capacitor c6 changes the start time, check the start waveform as well.) this action is not required for dac input. r2 r1 vref vrefin vref vrefin1/ vrefin2 mb39c007 c6
mb39c007 20 ds04-27246-3e [7] board layout, design example the board layout needs to be designed to ensure the stable operation of this ic. follow the procedure below for designing the layout. ? arrange the input capacitor (cin) as close as possible to both t he vdd and gnd pins. make a through- hole (th) near the pins of this capacito r if the board has planes for power and gnd. ? large ac currents flow between this ic and the input capacitor (cin), output capacitor (co), and external inductor (l). group these components as close as possible to this ic to reduce the overall loop area occupied by this group. also try to mount thes e components on the same surface and arrange wiring without through-hole wiring. use thick, short, and stra ight routes to wire the net (the layout by planes is recommended.). ? arrange a bypass capacitor for avdd as close as possible to both the avdd and agnd pins. make a through-hole (th) near the pins of this capa citor if the board has planes for power and gnd. ? the feedback wiring to the out should be wired from t he voltage output pin closest to the output capacitor (co). the out pin is extremely sensitive and should t hus be kept wired away from the lx1 pin and lx2 pin of this ic as far as possible. ? if applying voltage to the vrefin1/vrefin2 pins th rough dividing resistors, arrange the resistors so that the wiring can be kept as short as possible. also ar range them so that the gnd pin of vrefin1/vrefin2 resistor is close to the ic's agnd pin. further, pr ovide a gnd exclusively for the control line so that the resistor can be connected via a path that does not ca rry current. if installing a bypass capacitor for the vrefin, put it close to the vrefin pin. ? if applying voltage to the vdet pin through dividing resi stors, arrange the resistors so that the wiring can be kept as short as possible. also arrange so that t he gnd pin of the vdet resistor is close to the ic's agnd pin. further, provide a gnd exclusively for th e control line so that t he resistor can be connected via a path that does not carry current. ? try to make a gnd plane on the surface to which this ic will be mounted. for efficient heat dissipation when using the qfn-24 package, fujitsu semicon ductor recommends providing a thermal via in the footprint of the thermal pad. ? example of arranging ic sw system parts cin vin gnd cin vin co co gnd vin 1pin l l feedback line feedback line avdd bypass capacitor
mb39c007 ds04-27246-3e 21 ? notes for circuit design the switching operation of this ic works by monitori ng and controlling the peak cu rrent which, incidentally, serves as a form of short-circuit protection. however, do not leave the output short-circuited for long periods of time. if the output is short-circuited where v in < 2.9 v, the current limit value (peak current to the inductor) tends to rise. leaving in the short-circuit state, the te mperature of this ic will continue rising and activate the thermal protection. once the thermal protection stops the output, the tem perature of the ic will go down and operation will be restarted, after which the output will repeat the starting and stopping. although this effect will not destroy the ic, the ther mal exposure to the ic over prolonged hours may affect the peripherals surrounding it.
mb39c007 22 ds04-27246-3e example of standard operation characteristics (shown below is an example of characte ristics for connection according to ? test circuit for mea- suring typical operating characteristics?.) ? characteristics ch1 (continued) 50 60 70 80 90 100 1 10 100 1000 v in = 3.0 v v in = 4.2 v ta = +25c v out = 2.5 v mode = l v in = 3.7 v v in = 5.0 v 50 60 70 80 90 100 v in = 3.0 v v in = 4.2 v ta = +25c v out = 1.2 v mode = l v in = 3.7 v v in = 5.0 v 1 10 100 1000 50 60 70 80 90 100 v in = 3.0 v v in = 4.2 v ta = +25c v out = 1.8 v v in = 3.7 v v in = 5.0 v 1 10 100 1000 50 60 70 80 90 100 v in = 4.2 v ta = +25c v out = 3.3 v mode = l v in = 3.7 v v in = 5.0 v 1 10 100 1000 load current i out (ma) conversion efficiency ( % ) load current i out (ma) conversion efficiency ( % ) load current i out (ma) conversion efficiency ( % ) load current i out (ma) conversion efficiency ( % ) conversion efficiency vs. load current (pfm/pwm mode) conversion efficiency vs. load current (pfm/pwm mode) conversion efficiency vs. load current (pfm/pwm mode) conversion efficiency vs. load current (pfm/pwm mode)
mb39c007 ds04-27246-3e 23 (continued) 0 10 20 30 40 50 60 70 80 90 100 v in = 3.0 v v in = 4.2 v v in = 5.0 v ta = +25c v out = 2.5 v mode = open v in = 3.7 v 1 10 100 1000 0 10 20 30 40 50 60 70 80 90 100 v in = 3.0 v v in = 4.2 v ta = +25c v out = 1.2 v mode = open v in = 3.7 v v in = 5.0 v 1 10 100 1000 0 10 20 30 40 50 60 70 80 90 100 v in = 3.0 v v in = 4.2 v ta = +25c v out = 1.8 v mode = open v in = 3.7 v v in = 5.0 v 1 10 100 1000 0 10 20 30 40 50 60 70 80 90 100 v in = 4.2 v ta = +25c v in = 3.7 v v in = 5.0 v 1 10 100 1000 v out = 3.3 v mode = open load current i out (ma) conversion efficiency ( % ) load current i out (ma) conversion efficiency ( % ) conversion efficiency vs. load current (pwm fixed mode) conversion efficiency vs. load current (pwm fixed mode) conversion efficiency vs. load current (pwm fixed mode) conversion efficiency ( % ) conversion efficiency vs. load current (pwm fixed mode) conversion efficiency ( % ) load current i out (ma) load current i out (ma)
mb39c007 24 ds04-27246-3e (continued) 2.40 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 2.0 3.0 4.0 5.0 6.0 i out = -100 ma i out = 0 a ta = +25c v out = 2.5 v mode = l 2.40 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 2.0 i out = -100 ma i out = 0 a ta = +25c v out = 2.5 v mode = open 3.0 4.0 5.0 6.0 2.40 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 0 200 400 600 ta = +25c v in = 3.7 v v out = 2.5 v mode = l 800 2.40 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 0 ta = +25c 400 200 600 800 v out = 2.5 v v in = 3.7 v mode = open output voltage vs. input voltage (pwm fixed mode) output voltage v out (v) output voltage vs. input voltage (pfm/pwm mode) output voltage v out (v) input voltage v in (v) input voltage v in (v) load current i out (ma) output voltage v out (v) load current i out (ma) output voltage v out (v) output voltage vs. load current (pfm/pwm mode) output voltage vs. load current (pwm fixed mode)
mb39c007 ds04-27246-3e 25 (continued) 1.20 1.22 1.24 1.26 1.28 1.30 1.32 1.34 1.36 1.38 1.40 2.0 3.0 4.0 5.0 6.0 i out = -100 ma i out = 0 a ta = +25c v out = 2.5 v 1.20 1.22 1.24 1.26 1.28 1.30 1.32 1.34 1.36 1.38 1.40 -50 0 +50 +100 v in = 3.7 v v out = 2.5 v i out = 0 a 0 5 10 15 20 25 30 35 40 45 50 2.0 3.0 4.0 5.0 6.0 ta = +25c v out = 2.5 v mode = l 0 1 2 3 4 5 6 7 8 9 10 ta = +25c v out = 2.5 v mode = open 2.0 3.0 4.0 5.0 6.0 input voltage v in (v) reference voltage v ref (v) input voltage v in (v) input current i in ( a) input voltage v in (v) input current i in (ma) reference voltage vs. input voltage input current vs. input voltage (pfm/pwm mode) input current vs. input voltage (pwm fixed mode) operating ambient temperature ta ( c) reference voltage v ref (v) reference voltage vs. operating ambient temperature
mb39c007 26 ds04-27246-3e (continued) 0 5 10 15 20 25 30 35 40 45 50 -50 0 +50 +100 v in = 3.7 v v out = 2.5 v mode = l 0 1 2 3 4 5 6 7 8 9 10 v in = 3.7 v v out = 2.5 v mode = open -50 0 +50 +100 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 ta = +25c v out = 1.8 v i out = -100 ma 2.0 3.0 4.0 5.0 6.0 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 v in = 3.7 v v out = 2.5 v i out = -100 ma -50 0 +50 +100 power supply voltage v in (v) oscillation frequency f osc (mhz) operating ambient temperature ta ( c) oscillation frequency f osc (mhz) oscillation frequency vs. power supply voltage oscillation frequency vs. operating ambient temperature operating ambient temperature ta ( c) input current i in ( a) input current vs. operating ambient temperature (pfm/pwm mode) operating ambient temperature ta ( c) input current i in (ma) input current vs. operating ambient temperature (pwm fixed mode)
mb39c007 ds04-27246-3e 27 (continued) 0 0.1 0.2 0.3 0.4 0.5 0.6 ta = +25c p-ch n-ch 2.0 3.0 4.0 5.0 6.0 0 0.1 0.2 0.3 0.4 0.5 0.6 v in = 3.7 v v in = 5.5 v -50 0 +50 +100 0 0.1 0.2 0.3 0.4 0.5 0.6 v in = 3.7 v v in = 5.5 v -50 0 +50 +100 operating ambient temperature ta ( c) n-ch mos fet on resistor r onn ( ) n-ch mos fet on resistor vs. operating ambient temperature input voltage v in (v) mos fet on resistor r on ( ) mos fet on resistor vs. input voltage operating ambient temperature ta ( c) p-ch mos fet on resistor r onp ( ) p-ch mos fet on resistor vs. operating ambient temperature
mb39c007 28 ds04-27246-3e (continued) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 ta = +25c v out = 2.5 v v thlm d v thm m d 2.0 3.0 4.0 5.0 6.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 ta = +25c v out = 2.5 v v thhct v thlct 2.0 3.0 4.0 5.0 6.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 ta = +25c v porh v porl 2.0 3.0 4.0 5.0 6.0 input voltage v in (v) v xpor (v) v xpor vs. input voltage input voltage v in (v) mode v th (v) mode v th vs. input voltage input voltage v in (v) ctl v th (v) ctl v th vs. input voltage v thhct : circuit off on v thlct : circuit on off
mb39c007 ds04-27246-3e 29 (continued) 0 500 1000 1500 2000 2500 3000 3500 +85 -50 0 +50 +100 1250 3125 0 500 1000 1500 2000 2500 3000 3500 1563 +85 625 -50 0 +50 +100 operating ambient temperature ta ( c) power dissipation p d (mw) power dissipation vs. operating ambient temperature (with thermal via) operating ambient temperature ta ( c) power dissipation p d (mw) power dissipation vs. operating ambient temperature (without thermal via)
mb39c007 30 ds04-27246-3e ? switching waveform 2 s/di v v o1 : 20 m v /di v (ac) v lx1 : 2.0 v /di v l lx1 : 500 ma/di v v i n = 3.7 v , i o1 = ? 5 ma, v o1 = 2.5 v , mode = l ,ta = + 25 c 1 2 4 2 s/di v v o2 : 20 m v /di v (ac) v lx2 : 2.0 v /di v l lx2 : 500 ma/di v 1 2 4 v i n = 3.7 v , i o2 = ? 5 ma, v o2 = 1. 8 v , mode = l ,ta = + 25 c 2 s/di v v o1 : 20 m v /di v (ac) v lx1 : 2.0 v /di v l lx1 : 500 ma/di v 1 2 4 v i n = 3.7 v , v o1 = 2.5 v , i o1 = ? 8 00 ma, mode = l ,ta = + 25 c 2 s/di v v o2 : 20 m v /di v (ac) v lx2 : 2.0 v /di v l lx2 : 500 ma/di v 2 4 1 v i n = 3.7 v , v o2 = 1. 8 v , i o2 = ? 8 00 ma, mode = l ,ta = + 25 c pfm/pwm operation pwm operation
mb39c007 ds04-27246-3e 31 ? output waveforms at sudden load changes 100 s/di v v o1 : 200 m v /di v v lx1 : 2.0 v /di v l o1 : 1 a/di v 0 a ? 8 00 ma 1 2 4 v i n = 3.7 v , v o1 = 2.5 v , mode = l ,ta = + 25 c 100 s/di v v o2 : 200 m v /di v v lx2 : 2.0 v /di v l o2 : 1 a/di v 0 a ? 8 00 ma 1 2 4 v i n = 3.7 v , v o2 = 1. 8 v , mode = l ,ta = + 25 c 20 ma 8 00 ma 100 s/di v v o1 : 200 m v /di v v lx1 : 2.0 v /di v l o1 : 1 a/di v 4 2 1 v i n = 3.7 v , v o1 = 2.5 v , mode = l ,ta = + 25 c v lx2 : 2.0 v /di v v o2 : 200 m v /di v l o2 : 1 a/di v 100 s/di v 20 ma 8 00 ma 1 2 4 v i n = 3.7 v , v o2 = 1. 8 v , mode = l ,ta = + 25 c v lx1 : 2.0 v/div l o1 : 1 a/div 100 ma 800 ma 100 s/div v o1 : 200 mv/div 1 2 4 v in = 3.7 v, v o1 = 2.5 v, mode = l ,ta = + 25 c v lx2 : 2.0 v/div l o2 : 1 a/div 100 ma 800 ma v o2 : 200 mv/div 100 s/div 1 2 4 v in = 3.7 v, v o2 = 1.8 v, mode = l ,ta = + 25 c 0 a ? 800 ma ? 20 ma ? 800 ma ? 100 ma ? 800 ma
mb39c007 32 ds04-27246-3e ? ctl start-up waveform (continued) v lx1 : 5 v /di v ctl1 : 5 v /di v i lx1 : 1 a/di v v i n = 3.7 v , v o1 = 2.5 v , mode = l, ta = + 25 c 10 s/di v v o1 : 1 v /di v 2 4 1 3 ctl2 : 5 v /di v v o2 : 1 v /di v v lx2 : 5 v /di v i lx2 : 1 a/di v 10 s/di v v i n = 3.7 v , v o2 = 1. 8 v , mode = l, ta = + 25 c 3 4 2 1 i lx1 : 1 a/di v v lx1 : 5 v /di v v o1 : 1 v /di v ctl1 : 5 v /di v 10 s/di v v i n = 3.7 v , v o1 = 2.5 v , i o1 = ? 8 00 ma , mode = l, ta = + 25 c 2 4 1 3 10 s/di v v i n = 3.7 v , v o2 = 1. 8 v , i o2 = ? 8 00 ma , mode = l, ta = + 25 c 4 2 1 ctl2 : 5 v /di v v o2 : 1 v /di v v lx2 : 5 v /di v 3 i lx2 : 1 a/di v no load, no vrefin capacitor maximum load, no vrefin capacitor
mb39c007 ds04-27246-3e 33 (continued) ? ctl stop waveform v i n = 3.7 v , v o1 = 2.5 v , mode = l, ta = + 25 c 4 2 1 3 i lx1 : 1 a/di v v o1 : 1 v /di v ctl1 : 5 v /di v v lx1 : 5 v /di v 1 ms/di v v i n = 3.7 v , v o2 = 1. 8 v , mode = l, ta = + 25 c 4 2 1 3 i lx2 : 1 a/di v v o2 : 1 v /di v ctl2 : 5 v /di v v lx2 : 5 v /di v 1 ms/di v 4 2 1 3 v i n = 3.7 v , v o1 = 2.5 v , i o1 = ? 8 00 ma , mode = l, ta = + 25 c ctl1 : 5 v /di v v o1 : 1 v /di v i lx1 : 1 a/di v v lx1 : 5 v /di v 1 ms/di v 4 2 1 3 ctl2 : 5 v /di v v o2 : 1 v /di v v lx2 : 5 v /di v i lx2 : 1 a/di v 1 ms/di v v i n = 3.7 v , v o2 = 1. 8 v , i o2 = ? 8 00 ma , mode = l, ta = + 25 c no load, vrefin capacitor = 0.1 f maximum load, vrefin capacitor = 0.1 f 1 2 3 4 ctl1 : 5 v / di v 10 s / di v v o1 : 1 v / di v v lx1 : 5 v / di v v i n = 3.7 v , v o1 = 2.5 v , i o1 = ? 8 00 ma , mode = l, ta = + 25 c i lx1 : 1 a / di v 1 2 3 4 ctl2 : 5 v / di v 10 s / di v v o2 : 1 v / di v v lx2 : 5 v / di v i lx2 : 1 a / di v v i n = 3.7 v , v o2 = 1. 8 v , i o2 = ? 8 00 ma , mode = l, ta = + 25 c maximum load, vrefin capacitor = 0.1 f
mb39c007 34 ds04-27246-3e ? current limitation waveform ? voltage detection waveform ? waveform of dynamic output voltage transition (v o1 1.8 v 2.5 v) 1 4 100 s / di v v o1 : 1 v / di v 1.5 a i lx1 : 1 a / di v v i n = 3.7 v , v o1 = 2.5 v , mode = ope n , ta = + 25 c 600 ma 1 4 100 s / di v v o2 : 1 v / di v 1.5 a i lx2 : 1 a / di v v i n = 3.7 v , v o2 = 1. 8 v , mode = ope n , ta = + 25 c 600 ma 3 1 2 v in : 3 v / div v vdet : 1 v / div v xpor : 3 v / div v in = 3.7 v , ctlp = v in , ta = + 25 c 1 ms / div pull-up xpor to v in at 1 k . 1.8 v 1 3 v o1 : 200 mv / div v vrefin1 : 200 mv / div v in = 3.7 v , l o1 = ? 800 ma , ? 576 ma ( 3.125 ) , mode = l , ta = + 25 c , no vrefin capacitor 10 s / div 2.5 v 840 mv 610 mv 1.8 v
mb39c007 ds04-27246-3e 35 application circuit examples ? application circuit example 1 ? an external voltage is input to the reference vo ltage external input (vrefin1, vrefin2) , and the v out voltage is set to 2.97 times the v out setting gain. v in cpu v out1 dac1 l1 2.2 h l2 2.2 h 4.7 f c1 4.7 f c2 mb39c007 c3 4.7 f 4.7 f ctl1 mode1 vrefin1 out1 xpor lx1 dvdd1 r8 1 m r7 1 m ctl2 mode2 vref vrefin2 vdet ctlp dvdd2 dgnd1 dgnd2 c4 0.1 f c5 avdd agnd out2 lx2 dac2 apli2 v out2 v out = 2.97 v refin 3 8 2 23 9 22 6 7 1 24 21 18 10 13 4 5 16 17 19 20 14 15 11 12 apli1 l = pfm/pwm open = pwm
mb39c007 36 ds04-27246-3e ? application circuit example 2 ? the voltage of vref pin is input to the reference voltage external input (vrefin1, vrefin2) by dividing resistors. the v out1 voltage is set to 2.5 v and v out2 voltage is set to 1.8 v. r8 1 m r6 300 k r2 r5 ( 13 k + 330 k ) 343 k r1 ( 13 k + 150 k ) 163 k 300 k r7 1 m cpu mb39c0007 ctl1 vref vrefin1 ctl2 mode2 mode1 vrefin2 ctlp 3 8 2 23 6 9 22 7 1 v in c3 4.7 f 4.7 f dvdd1 dvdd2 dgnd1 dgnd2 c4 0.1 f c5 avdd agnd 4 5 16 17 19 20 14 15 11 12 out1 xpor lx1 out2 lx2 v out1 l1 2.2 h l2 2.2 h 4.7 f c1 4.7 f c2 apli2 v out2 24 21 18 10 13 apli1 v out1 = 2.97 v refin1 ( v ref = 1.30 v ) v ref v refin1 = r2 r1 + r2 1.30 v = 2.5 v v out1 = 2.97 300 k 163 k + 300 k 1.30 v = 1.8 v v out2 = 2.97 300 k 343 k + 300 k vdet l = pfm/pwm open = pwm
mb39c007 ds04-27246-3e 37 ? application circuit exa mple components list tdk : tdk corporation fdk : fdk corporation koa : koa corporation component item part number specification package vendor l1 inductor vlf4012at-2r2m 2.2 h, rdc = 76 m smd tdk mipw3226d2r2m 2.2 h, rdc = 100 m smd fdk l2 inductor vlf4012at-2r2m 2.2 h, rdc = 76 m smd tdk mipw3226d2r2m 2.2 h, rdc = 100 m smd fdk c1 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c2 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c3 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c4 ceramic capacitor c2012jb1a475k 4.7 f (10 v) 2012 tdk c5 ceramic capacitor c1608jb1e104k 0.1 f (50 v) 2012 tdk r1 resistor rk73g1jttd d 13 k rk73g1jttd d 150 k 13 k 150 k 1608 1608 koa koa r2 resistor rk73g1jttd d 300 k 300 k 1608 koa r5 resistor rk73g1jttd d 13 k rk73g1jttd d 330 k 13 k 330 k 1608 1608 koa koa r6 resistor rk73g1jttd d 300 k 300 k 1608 koa r7 resistor rk73g1jttd d 1 m 1 m 0.5 % 1608 koa r8 resistor rk73g1jttd d 1 m 1 m 0.5 % 1608 koa
mb39c007 38 ds04-27246-3e usage precautions 1. do not configure the ic over the maximum ratings if the lc is used over the maximum ra tings, the lsl may be permanently damaged. it is preferable for the device to normally operate within the recommended usa ge conditions. usage outside of these conditions adversely affect the reliability of the lsi. 2. use the devices within recommended operating conditions the recommended operating conditions are the conditions under which the lsl is guaranteed to operate. the electrical ratings are guaranteed when the device is used within the recommended operating conditions and under the conditions stated for each item. 3. printed circuit board ground lines should be set up with consideration for common impedance 4. take appropriate static electricity measures ? containers for semiconductor materials should have anti -static protection or be made of conductive ma- terial. ? after mounting, printed circuit boards should be stored and shipped in conductive bags or containers. ? work platforms, tools, and instruments should be properly grounded. ? working personnel should be gro unded with resistance of 250 k to 1 m between body and ground. 5. do not apply negative voltages the use of negative voltages below ? 0.3 v may create parasitic transis tors on lsi lines, which can cause abnormal operation.
mb39c007 ds04-27246-3e 39 ordering information part number package remarks mb39c007wqn 24-pin plastic qfn (lcc-24p-m10)
mb39c007 40 ds04-27246-3e rohs compliance information of lead (pb) free version the lsi products of fujitsu semi conductor with ?e1? are compliant with rohs directive, and has observed the standard of lead, cadmium, mercury, hexavalent chromium, polybrominated biphenyls (pbb) , and polybrominated diphenyl ethers (pbde). a product whose part number has traili ng characters ?e1? is rohs compliant. marking format (lead free version) xxxxxx xe1 index lead-free version(e1)
mb39c007 ds04-27246-3e 41 labeling sample (lead free version) 2006/03/01 assembled in japan g qc pass (3n) 1mb123456p-789-ge1 1000 (3n)2 1561190005 107210 1,000 pcs 0605 - z01a 1000 1/1 1561190005 mb123456p - 789 - ge1 mb123456p - 789 - ge1 mb123456p - 789 - ge1 pb lead-free mark jeita logo jedec logo the part number of a lead-free product has the trailing characters ?e1?. ?assembled in china? is printed on the label of a product assembled in china.
mb39c007 42 ds04-27246-3e evaluation board specification the mb39c007 evaluation board provides the proper fo r evaluating the efficiency and other characteristics of the mb39c007. ? terminal information symbol functions vin power supply terminal in standard condition 3.1 v to 5.5 v* * : when the vin/vout difference is to be held within 0.6 v or less, such as for devices with a standard output voltage (vout1 = 2.5 v) when vin < 3.1 v, fujitsu semi- conductor recommends changing the output capacity (c1, c2) to 10 f. vout1, vout2 output terminals (vout1: ch1, vout2: ch2) vctl power supply terminal for setting th e ctl1, ctl2 and ctlp terminals. use by connecting with vin (when sw is mounted). ctl1, ctl2 direct supply terminal of ctl (ctl1 : for ch1, ctl2 : for ch2) ctl1, ctl2 = 0 v to 0.8 v (typ.) : shutdown ctl1, ctl2 = 0.95 v (typ.) to v in (5 v max) : normal operation mode1, mode2 direct supply terminal of mode (c h1 : for mode1, ch2 : for mode2) mode1, mode2 = 0 v to 0.4 v(max) : pfm/pwm mode mode1, mode2 = open(remove r1 and r4) : pwm mode vref reference voltage output terminal vref = 1.30 v (typ.) vrefin1, vrefin2 external reference voltage input terminals (vrefin1 : for ch1, vrefin2 : for ch2) when an external reference voltage is supplied, connect it to the terminal for each chan- nel. vdet voltage input terminal for voltage detection ctlp voltage detection circuit block control terminal ctlp = l : voltage detection circuit block stop ctlp = h : normal operation xpor voltage detection circuit output terminal the n-ch mos open drain circuit is connected. vxpor pull-up voltage termi nal for the xpor terminal pgnd ground terminal connect power supply gnd to the pgnd terminal next to the vin terminal. connect output (load) gnd to the pgnd te rminal between the vout1 terminal and the vout2 terminal. agnd ground terminal
mb39c007 ds04-27246-3e 43 ? startup terminal information ? jumper information ? setup and checkup (1) setup 1. connect the ctl1 terminal and the ctl2 terminal to the vin terminal. 2. put it into ?l? state by connecti ng the ctlp terminal to the agnd pad. 3. connect the power supply terminal to the vin term inal, and the power supply gnd terminal to the pgnd terminal. make sure pgnd is connected to the pgnd terminal next to the vin terminal. (example of setting power-supply voltage : 3.7 v) ( 2 ) checkup supply power to vin. the ic is operating normally if vout1 = 2.5 v (typ) and vout2 = 1.8 v (typ). terminal name condition functions ctl1 l : open h : connect to vin on/off switch for ch1 l : shutdown h : normal operation. ctl2 l : open h : connect to vin on/off switch for ch2 l : shutdown h : normal operation. ctlp l : open h : connect to vin on/off switch for the voltage detection block l: stops the voltage detection circuit h: normal operation. jp functions jp1 short-circuited in the layout pattern of the board (normally used shorted). jp2 short-circuited in the layout pattern of the board (normally used shorted). jp3 not mounted jp6 normally used shorted (0 )
mb39c007 44 ds04-27246-3e ? component layout on the evaluation board (top view) mb39c007evb-06rev. 2.0 mode2 vrefin2 xpor vxpor agnd ctl2 ctl1 ctlp vctl vref vdet vrefin1 mode1 vin vout1 vout2 pgmd jp3 c2 c4 c7 r5 c5 r4-2 r4-1 r8 r10 r9 r3 sw1 ctl2 ctl1 ctlp jp6 r1-1r1-2 r4 c1 l2 l1 m1 c3 c6 r2 r1 r7 r6-2 r6-1 14 off
mb39c007 ds04-27246-3e 45 ? evaluation board layout (top view) top side (layer1) inside g n d (layer2) inside v i n & g n d (layer3) bottom side (layer4)
mb39c007 46 ds04-27246-3e ? connection diagram jp3 jp1 i i n v i n v out1 l1 2.2 h r7 300 k c1 4.7 f v ctl ctl1 v ref i out mb39c007 mode1 s w 1 r 8 1 m ctl1 mode1 v refi n 1 out1 xpor lx1 xpor ctl2 s w 1 r9 1 m ctl2 3 9 8 2 v ref v ref 6 v ref v det r1-1 0 r1-2 300 k r2 75 k v refi n 1 s w 1 ctlp r5 300 k v ref v refi n 2 23 v refi n 2 v det 7 ctlp 1 r10 1 m d v dd2 19 13 10 pg n d dg n d2 17 c4 4.7 f a v dd 5 ag n d 4 c5 0.1 f ag n d jp6 jp2 v out2 l2 2.2 h c2 4.7 f i out out2 lx2 1 8 21 r3 1m v xpor 24 r1 0 mode2 mode2 22 r4 0 dg n d2 16 d v dd2 20 d v dd1 11 15 c3 4.7 f dg n d1 14 d v dd1 12 dg n d1 c6 0.1 f r4-1 13 k r4-2 330 k c7 0.1 f r6-1 13 k r6-2 150 k * not mounted
mb39c007 ds04-27246-3e 47 ? component list note : these components are recommended based on the operating tests authorized. fsl : fujitsu semiconductor limited tdk : tdk corporation koa : koa corporation ssm : susumu co., ltd compo- nent part name model number specification package vendor remark m1 ic mb39c007wqn ? qfn-24 fsl l1 inductor vlf4012at-2r2m 2.2 h, rdc=76 m smd tdk l2 inductor vlf4012at-2r2m 2.2 h, rdc=76 m smd tdk c1 ceramic capacitor c2012jb1a475k 4.7 f(10 v) 2012 tdk c2 ceramic capacitor c2012jb1a475k 4.7 f(10 v) 2012 tdk c3 ceramic capacitor c2012jb1a475k 4.7 f(10 v) 2012 tdk c4 ceramic capacitor c2012jb1a475k 4.7 f(10 v) 2012 tdk c5 ceramic capacitor c1608jb1e104k 0.1 f(50 v) 1608 tdk c6 ceramic capacitor c1608jb1h104k 0.1 f(50 v) 1608 tdk c7 ceramic capacitor c1608jb1h104k 0.1 f(50 v) 1608 tdk r1 resistor rk73z1j 0 , 1 a 1608 koa r1-1 resistor rk73z1j 0 , 1 a 1608 koa r1-2 resistor rr0816p-304-d 300 k 0.5% 1608 ssm r2 resistor rr0816p-753-d 75 k 0.5% 1608 ssm r3 resistor rk73g1jttd d 1m 1 m 0.5% 1608 koa r4 resistor rk73z1j 0 , 1 a 1608 koa r4-1 resistor rr0816p-133-d 13 k 0.5% 1608 ssm r4-2 resistor rr0816p-334-d 330 k 0.5% 1608 ssm r5 resistor rr0816p-304-d 300 k 0.5% 1608 ssm r6-1 resistor rr0816p-133-d 13 k 0.5% 1608 ssm r6-2 resistor rr0816p-154-d 150 k 0.5% 1608 ssm r7 resistor rr0816p-304-d 300 k 0.5% 1608 ssm r8 resistor rk73g1jttd d 1m 1 m 0.5% 1608 koa r9 resistor rk73g1jttd d 1m 1 m 0.5% 1608 koa r10 resistor rk73g1jttd d 1m 1 m 0.5% 1608 koa sw1 dip switch ???? not mounted jp1 jumper ???? pattern- shorted jp2 jumper ???? pattern- shorted jp3 jumper ???? not mounted jp6 jumper rk73z1j 0 , 1a 1608 koa
mb39c007 48 ds04-27246-3e ev board ordering information ev board part no. ev board version no. remarks mb39c007evb-06 mb39c007evb-06 rev.2.0 qfn-24
mb39c007 ds04-27246-3e 49 package dimension please check the latest package dimension at the following url. http://edevice.fujitsu.com/package/en-search/ 24-pin plastic qfn lead pitch 0.50 mm package width package length 4.00 mm 4.00 mm sealing method plastic mold mounting height 0.80 mm max weight 0.04 g 24-pin plastic qfn (lcc-24p-m10) (lcc-24p-m10) +0.03 ? 0.02 ? .001 +.001 0.02 (.001 ) c 2009-2010 fujitsu semiconductor limited c24060s-c-1-2 index area (.157 .004) 4.00 0.10 4.00 0.10 (.157 .004) 2.60 0.10 0.50(.020) typ (.016 .002) 0.40 0.05 1pin corner (c0.35(c.014)) 0.25 0.05 (.010 .002) (.030 .002) 0.75 0.05 (0.20(.008)) (.102 .004) 2.60 0.10 (.102 . 004) dimensions in mm (inches). note: the values in parentheses are reference values.
mb39c007 50 ds04-27246-3e contents page - description ...................................... ............................................ ......................... .................. ....................... 1 - features ..................................... ......................................... ........................... .................... ............................. 1 - applications ...................................... ............................................ ......................... .................. ..................... 1 - pin assignment ......................................................... .................................... ................................ ................ 2 - pin descriptions ........................................................ ..................................... ................................ ............. 3 - i/o pin equivalent circuit diagram ................................................. ................................ .................. 4 - block diagram ........................................................ ................................... .................................. ................. 5 - function of each block ..................................... ............................. ................................... .................... 7 - absolute maximum ratings ........................................................ ............................... ............................ 9 - recommended operating conditions ............................................ ................................................ 10 - electrical characteristics ..................................................... ............................... ............................ 11 - test circuit for measuring typi cal operating characteristics ................................ 13 - application notes ........................................................ ...................................... ............................... ......... 14 - example of standard operation characteristics ................................ ............................... 22 - application circuit examples ............................... .......................................... .................................... 35 - usage precautions ....................................................... ...................................... ................................ ...... 38 - ordering information ..................................... .............................................. .......................................... 39 - rohs compliance information of lead (pb) free version .............................. .................... 40 - marking format (lead free version) .............................................. ................................................ 40 - labeling sample (lead free version) ............................................. ................................................ 41 - evaluation board specification ................................................... ................................ .................... 42 - ev board ordering information ................................................... ................................ .................... 48 - package dimension ........................................................ ...................................... ............................... ....... 49
mb39c007 ds04-27246-3e 51 memo
mb39c007 fujitsu semiconductor limited nomura fudosan shin-yokohama bldg . 10-23, shin-yokohama 2-chome, kohoku-ku yokohama kanagawa 222-0033, japan tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ for further information please contact: north and south america fujitsu semiconductor america, inc. 1250 e. arques avenue, m/s 333 sunnyvale, ca 94085-5401, u.s.a. tel: +1-408-737-5600 fax: +1-408-737-5999 http://us.fujitsu.com/micro/ europe fujitsu semiconductor europe gmbh pittlerstrasse 47, 63225 langen, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://emea.fujitsu.com/semiconductor/ korea fujitsu semiconductor korea ltd. 206 kosmo tower building, 1002 daechi-dong, gangnam-gu, seoul 135-280, republic of korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ asia pacific fujitsu semiconductor asia pte. ltd. 151 lorong chuan, #05-08 new tech park 556741 singapore tel : +65-6281-0770 fax : +65-6281-0220 http://www.fujitsu.com/sg/se rvices/micro/semiconductor/ fujitsu semiconductor shanghai co., ltd. rm. 3102, bund center, no.222 yan an road (e), shanghai 200002, china tel : +86-21-6146-3688 fax : +86-21-6335-1605 http://cn.fujitsu.com/fss/ fujitsu semiconductor pacific asia ltd. 10/f., world commerce centre, 11 canton road, tsimshatsui, kowloon, hong kong tel : +852-2377-0226 fax : +852-2376-3269 http://cn.fujitsu.com/fsp/ specifications are subject to change without notice. for further information please contact each office. all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with sales representatives before ordering. the information, such as descriptions of function and applicatio n circuit examples, in this docum ent are presented solely for t he purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu semiconductor does not warrant proper operation of the device with respect to use based on such informa tion. when you develop equipment incorporat ing the device based on such information, you must assume any re sponsibility arising out of such use of the information. fujitsu semiconductor assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic di agrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent ri ght or copyright, or any other right of fujitsu semiconductor or any third party or does fujitsu semiconductor warrant non-infringement of any third-part y's intellectual property right or other ri ght by using such information. fujitsu semiconductor assumes no liab ility for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including wit hout limitation, ordinary industrial use, general office use, persona l use, and household use, but are not designed, developed and m anufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a ser ious effect to the public, and could lead directly to death, personal injury , severe physical damage or ot her loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile la unch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersi ble repeater and artificial satellite). please note that fujitsu semiconductor will not be liable against you and/or any thir d party for any claims or damages aris- ing in connection with above-men tioned uses of the products. any semiconductor devices have an inherent ch ance of failure. you must protect against in jury, damage or loss from such failure s by incorporating safety design measures into your facility a nd equipment such as redundancy, fi re protection, and prevention of over- current levels and other abnormal operating conditions. exportation/release of any products described in this document may require necessary procedures in accordance with the regulati ons of the foreign exchange and foreign trade control law of japan and/or us export control laws. the company names and brand names herein are the trademarks or registered trademarks of their respective owners. edited: sales promotion department

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